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    RGTI
    Earnings call· Jun 2026(Q2 FY26)

    Rigetti Computing Q2 FY26 earnings call RGTI

    Aug 6, 2026 Source

    Executive summary

    Rigetti Q2 FY26 — CHIPS Act Funding & HPC Partnership Advance Quantum Roadmap

    Rigetti Computing advanced its quantum roadmap in Q2 FY26, demonstrating technical leadership with its Cepheus-1-108Q system and securing a Letter of Intent for up to $100 million in CHIPS Act funding. The company also expanded its partnership with HPE for hybrid quantum-classical supercomputing. While the quantum computing market remains early-stage, Rigetti is focused on disciplined capital deployment and accelerating its technology to achieve quantum advantage, with increasing interest from government, academic, and commercial sectors.

    Highlights

    5
    • Revenue increased to $5.1 million in Q2 FY26, up from $1.8 million in Q2 FY25, driven by on-premises Novera QPU sales.

    • Gross margin improved significantly to 43% in Q2 FY26, compared to 31% in the prior year period.

    • Secured a Letter of Intent with the U.S. Department of Commerce for up to $100 million in CHIPS Act funding over 3 years.

    • Expanded collaboration with HPE and the Pittsburgh Supercomputing Center to develop a hybrid quantum-classical supercomputer.

    • Cepheus-1-108Q maintains strong performance with median single qubit gate fidelity of approximately 99.9% and median 2-qubit gate fidelity of roughly 99.1%.

    Concerns

    4
    • GAAP net loss widened to $52.6 million in Q2 FY26, compared to $39.7 million in Q2 FY25.

    • Non-GAAP net loss increased to $16 million ($0.05 per diluted share) in Q2 FY26, up from $13.3 million ($0.04 per diluted share) in Q2 FY25.

    • Total operating expenses rose to $30.3 million in Q2 FY26 from $20.4 million in Q2 FY25, primarily due to R&D investments.

    • Stock-based compensation increased to $7 million in Q2 FY26, compared to $3.6 million in the prior year period.

    Guidance & targets

    6
    CategoryTargetConfidence
    2-qubit gate fidelity
    approximately 99.5%
    high materiality
    High
    Qubit count
    approximately 1,000 qubits
    high materiality
    High
    2-qubit gate fidelity
    99.9%
    high materiality
    High
    Gate speed
    below 40 nanoseconds
    high materiality
    High
    C-DAC 108-qubit system revenue recognition
    recognized in the fourth quarter of this year
    medium materiality
    High
    Capital expenditures
    elevated relative to prior years
    medium materiality
    High

    Operational metrics

    15
    Non-GAAP net loss
    $16Mvs $13.3M in Q2 FY25
    Q2 FY26

    Excludes stock-based compensation and fair value adjustments to warrant and earn-out liabilities.

    Non-GAAP diluted EPS
    $0.05vs $0.04 in Q2 FY25
    Q2 FY26

    Excludes stock-based compensation and fair value adjustments to warrant and earn-out liabilities.

    Gross margin
    43%vs 31% in Q2 FY25
    Q2 FY26

    Year-over-year improvement.

    Operating expenses
    $30.3Mvs $20.4M in Q2 FY25
    Q2 FY26

    Increased spending concentrated in R&D.

    Stock-based compensation
    $7Mvs $3.6M in Q2 FY25
    Q2 FY26

    Increased year-over-year.

    Cash and investments balance
    $541.3Mvs $569M as of Q1 FY26 and $589.8M as of FY25
    Q2 FY26

    Includes cash, cash equivalents and available-for-sale investments. No debt.

    Coherence times
    25-30
    Current

    Primary constraint on fidelity, initiatives underway to improve.

    Single qubit gate fidelity
    99.9%
    Q2 FY26

    Median performance level.

    Two-qubit gate fidelity
    99.1%
    Q2 FY26

    Median performance level.

    Two-qubit gate fidelity
    99.6%improved from 99.5% in Q1
    Q2 FY26

    Median performance level.

    Two-qubit gate fidelity
    99.8%
    Q2 FY26

    Median performance level.

    Gate speed
    60
    Q2 FY26

    Performance level.

    Qubit count
    108
    Q2 FY26

    System is built from 12 interconnected 9-qubit chiplets.

    Qubit count
    9
    Q2 FY26

    System provided to HPE/PSC, University of Saskatchewan, and Japanese conglomerate.

    Chiplet size
    6mm x 6mm
    Current

    Size of the 9-qubit chiplet.

    Industry KPIs

    6
    MetricValueDetails
    Backlog order book$8.4MUSD
    Fab capacity utilizationplenty
    Bookings net order intake
    Design wins socket pipeline
    Node platform ramp schedule1,000 qubitsqubits
    End market segment revenue mix$5.1MUSD

    Orderbook & backlog

    1
    C-DAC order for 108-qubit system$8.4MQ2 FY26

    Expected to be recognized in Q4 FY26 following installation and performance acceptance testing.

    Product announcements

    2
    ProductTypeDetails
    Cepheus-1-108Qmilestone
    Novera QPUexpansion

    Deals & partnerships

    8
    U.S. Department of CommerceLetter of Intent for funding under the CHIPS Actup to $100M3 years

    Selected for a potential award of up to $100 million in funding over 3 years to accelerate superconducting quantum computing R&D. Contemplated transaction structure includes an equity stake for the department. Not yet a definitive agreement.

    HPE and Pittsburgh Supercomputing Center (PSC)Expanded collaboration to develop a hybrid quantum-classical supercomputer

    Rigetti will deliver a 9-qubit Novera quantum computing system into PSC's new TangleLab test bed, funded by a National Science Foundation grant. Designed to integrate the Novera system with an HPE-powered supercomputing environment for hybrid quantum classical workloads.

    University of SaskatchewanSale of Novera QPU

    Recent win for a Novera QPU.

    Large Japanese conglomerate (research arm)Sale of Novera QPU

    Recent win for a Novera QPU.

    C-DAC (India)Order for on-premises 108-qubit system$8.4M

    Progressing on the $8.4 million C-DAC order for an on-premises 108-qubit system in India. Revenue recognition expected in Q4 FY26 following installation and performance acceptance testing.

    RiverlaneCollaboration on Quantum Error Correction (QEC) technology

    Integrating innovative solutions from partners to advance technology faster, such as QEC technology from Riverlane.

    QphoXCollaboration on transduction technology

    Integrating innovative solutions from partners to advance technology faster, such as transduction technology from QphoX (converting microwave signals to optical signals and vice versa).

    FermilabJoint IP for coherence time improvement

    Joint IP where capping niobium superconducting contacts with tantalum has demonstrated meaningful coherence time improvements in fundamental experiments. Learnings are being incorporated into production chip designs.

    Capital programs

    2
    CHIPS Act Fundingannounced (LOI)up to $100M
    Funding: U.S. Department of Commerce

    Benefit: accelerate superconducting quantum computing R&D, tackle key scaling bottlenecks, accelerate multiple generations of superconducting quantum processors and associated control electronics

    Letter of Intent for funding under the CHIPS Research and Development Office broad agency announcement. Contemplated transaction structure includes the department receiving an equity stake in Rigetti. Not yet a definitive agreement.

    Fab-1 and dilution refrigeration capacity investmentsunderway
    Period spend: elevated in 2026

    Benefit: support higher cubic count systems

    Capital expenditures in Q2 FY26 were primarily driven by these investments. Expected to be elevated relative to prior years.

    Risks & headwinds

    4
    Variability in revenue recognitionongoing

    Revenue profile continues to be influenced by the timing of system deliveries and government-funded projects.

    Mitigation: Viewed as inherent to the current stage of the quantum computing market, not a driver of long-term capital allocation or technology strategy.

    GAAP net loss impact from non-cash adjustmentsQ2 FY26

    Net loss for the quarter was $52.6 million, impacted by noncash fair value adjustments to derivative warrant and earn-out liabilities.

    Mitigation: These adjustments can introduce significant quarter-to-quarter volatility but do not affect how the business is operated or capital allocated.

    Coherence time limitationsCurrent

    Current coherence times are in the 25 to 30 microsecond range, which are the primary constraint on fidelity.

    Mitigation: Executing on chip design and material initiatives to roughly double or triple those times over the next several years, including joint IP with Fermilab and refining deposition processes.

    CHIPS Act funding not yet definitivenear-term

    The LOI for up to $100 million in CHIPS Act funding is not yet a definitive agreement.

    Mitigation: Company is actively discussing with the Department of Commerce to finalize the agreement, including specific technical programs and equity issuance details.

    What to watch in Q3 FY26

    5

    Cepheus-1-108Q 2-qubit gate fidelity

    later this year
    Currentapproximately 99.1%
    Targetapproximately 99.5%

    Why it matters

    Achieving this fidelity target is a key milestone for the Cepheus-1-108Q system and demonstrates progress towards quantum advantage.

    Near term, that means driving Cepheus-1-108Q toward a median 2-qubit gate fidelity of approximately 99.5% later this year while maintaining our gate speed advantages.

    Q&A highlights

    6

    When can we expect to see the impact of coherence time improvements on fidelity, given it's the primary limitation?

    Subodh explained that coherence time (currently 25-30 microseconds) is the limiting factor for 2-qubit gate fidelity. They are working on chip design and material initiatives (like niobium/tantalum capping) to double or triple these times. He expects fidelity to increase on the 108-qubit system by year-end, but emphasized careful testing before deploying upgrades to avoid inadvertently regressing other technical progress.

    We definitely expect fidelity to increase at the 108 qubit level before the end of this year, and we'll update everyone when we are ready to deploy a new system.

    asked by Brian Kinstlinger · answered by Subodh Kulkarni

    2 min read5 chapters

    Detailed Narrative

    01

    Technical Leadership & Roadmap Progress

    Rigetti continues to demonstrate technical leadership with its Cepheus-1-108Q system, one of the highest qubit count gate-based quantum computers globally, maintaining median single qubit gate fidelity of ~99.9% and median 2-qubit gate fidelity of ~99.1% with gate speeds around 60 nanoseconds. The company is focused on improving coherence times (currently 25-30 microseconds) by roughly 2-3x over the next several years through chip design, material initiatives (e.g., niobium/tantalum capping with Fermilab), and fabrication process refinements. The long-term objective is to reach approximately 1,000 qubits, 99.9% 2-qubit gate fidelities, and gate speeds below 40 nanoseconds in roughly 3 years, leveraging its modular chiplet-based architecture.

    02

    Strategic CHIPS Act Funding

    A Letter of Intent (LOI) with the U.S. Department of Commerce for up to $100 million in CHIPS Act funding over 3 years further validates Rigetti's superconducting chiplet-based approach. This prospective partnership aims to accelerate R&D, tackle key scaling bottlenecks in multichip architectures, and advance multiple generations of quantum processors and control electronics at Fab-1. The funding, which would involve an equity stake for the department, is seen as strategically significant for national security and strengthening domestic industry, aligning with the administration's broader quantum computing investments.

    03

    Expanded Partnerships & Customer Momentum

    Rigetti announced an expanded collaboration with HPE and the Pittsburgh Supercomputing Center to develop a hybrid quantum-classical supercomputer, integrating a 9-qubit Novera system with an HPE-powered supercomputing environment. This initiative, funded by an NSF grant, will allow researchers to develop and test hybrid workloads on real hardware. The company also secured Novera QPU sales to the University of Saskatchewan and a large Japanese conglomerate, alongside continued progress on the $8.4 million C-DAC order for a 108-qubit system in India, reflecting growing demand for its on-premises systems.

    04

    Evolving Market & Capital Discipline

    The quantum computing market remains early-stage, with revenue variability influenced by system delivery timing and government projects. However, global investment is expanding, led by governments (e.g., U.K.'s ProQure initiative) and increasingly complemented by commercial interest across industries like materials, logistics, and financial services. Rigetti maintains a disciplined capital deployment strategy, directing the majority of spending towards core R&D activities to advance its technology platform, with the CHIPS Act funding expected to further reinforce this approach while being mindful of potential dilution.

    05

    Fab-1 Capabilities and Future Scaling

    Rigetti's Fremont Fab-1, a 150-millimeter facility, currently has ample capacity for quantum chip production, with 9-qubit chiplets measuring approximately 6mm by 6mm. While capacity is not a concern, the company is exploring options for upgrading the fab to enhance capability, particularly in areas like automation and advanced equipment, to support future chiplet designs (e.g., 36-qubit chiplets) and the roadmap towards 1,000 qubits and beyond. Investments in dilution refrigeration and infrastructure are also underway to support higher qubit count systems.

    AI-generated summary of the company’s earnings call. Not investment advice.